#ifndef __BOARD_H
#define __BOARD_H
#include "../setup.h"
#define XTI_FREQ			24000000
#define BOOTROM_COLD_RESET_BRANCH 0x0000019c
#define SZ_1G				0x40000000
#define SZ_2G				0x80000000

//PLL
#ifdef CONFIG_TARGET_SALUTE_PM
#define CPLL_VALUE			0x14
#else
#define CPLL_VALUE			0x0F
#endif

#define APLL_VALUE			0x1F
#define SPLL_VALUE			0x0B	/* L1_HCLK = 288 MHz */
#define DIV_SYS0_CTR_VALUE		0
#define DIV_SYS1_CTR_VALUE		1	/* L3_PCLK = L1_HCLK / 2 */
//FREQ
#define APLL_FREQ			(XTI_FREQ * (APLL_VALUE + 1))
#define CPLL_FREQ			(XTI_FREQ * (CPLL_VALUE + 1))
#define SPLL_FREQ			((XTI_FREQ * (SPLL_VALUE + 1)) >> DIV_SYS0_CTR_VALUE)
#define CONFIG_TIMER_CLK_FREQ		(SPLL_FREQ >> DIV_SYS1_CTR_VALUE)
#define DIV_DDR0_CTR_VALUE              0
#define DIV_DDR1_CTR_VALUE              0
//SDRAM SIZE
#define CONFIG_NR_DRAM_BANKS		2
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		SZ_1G
#define PHYS_SDRAM_1			0xA0000000
#define PHYS_SDRAM_1_SIZE		SZ_1G

#endif /* __BOARD_H */