#set 0x38094068 0xf  # CMCTR.GATE_DSP_CTR
#set 0x3809410c 0x1  # CMCTR.SEL_SPLL
#set 0x38094100 0x2  # CMCTR.SEL_APLL
#set 0x38094104 0x2  # CMCTR.SEL_CPLL
#set 0x38094114 0x2  # CMCTR.SEL_UPLL
#set 0x38094108 0x4  # CMCTR.SEL_DPLL
#set 0x38094048 0x21 # CMCTR.GATE_CORE_CTR
#set 0x3809404c 0xffffffff # CMCTR.GATE_SYS_CTR
# setup registers to allow high frequences
#set 0x38094004 0x1   # DIV_MPU_CTR = 1;
#set 0x38094008 0x3   # DIV_ATB_CTR = 3;
#set 0x3809400c 0x1   # DIV_APB_CTR = 1;
#set 0x38094014 0x1   # GATE_MPU_CTR = 1;