// ******************** risc_interrupt.h ***************************************
//                 Risc-Dsp runtime library
//
//  Dma module provides interface to dma memory dma channels handling. It provides functions
//  - for selecting dma channel, configuring it and coping data via selected channel.
//  - for selecting dma channel, configuring it in chain mode and coping data via selected channel
//  in chain mode. The chain mode may be useful in coping of non-continuous data blocks.
//  define __DMA_TIME_COUNTING__ if you want to use time count of DMA
//
// (c) multicore.ru
//
// *******************************************************************

#ifndef _DMA_H_
#define _DMA_H_

#include "erlcommon.h"

#ifdef	__cplusplus
extern "C" {
#endif

//#define __DMA_TIME_COUNTING__

// maximum block size transferred by one dma transfer
#define DMA_MAX_BLOCK_SIZE 0x40000

#define MEMCH_CSR_RUN		1
#define MEMCH_CSR_DIR		(1<<1)
#define MEMCH_CSR_WN		(1<<2)
#define MEMCH_CSR_WN_FULL	(0xF<<2)
#define MEMCH_CSR_EN64		(1<<6)
#define MEMCH_CSR_STARTDSP	(1<<7)
#define MEMCH_CSR_MODE		(1<<8)
#define MEMCH_CSR_2D		(1<<9)
#define MEMCH_CSR_MASK		(1<<10)
#define MEMCH_CSR_CHEN		(1<<12)
#define MEMCH_CSR_IM		(1<<13)
#define MEMCH_CSR_END		(1<<14)
#define MEMCH_CSR_DONE		(1<<15)
#define MEMCH_CSR_WCX		(1<<16)

#define QSTR1_MCH0_MASK      1
#define QSTR1_MCH1_MASK      (1<<1)
#define QSTR1_MCH2_MASK      (1<<2)
#define QSTR1_MCH3_MASK      (1<<3)

typedef union
{
    unsigned int _val;
    struct
    {
        unsigned csr_run      : 1;
        unsigned csr_dir      : 1;
        unsigned csr_wn       : 4;
        unsigned csr_en64     : 1;
        unsigned csr_startdsp : 1;
        unsigned csr_mode     : 1;
        unsigned csr_2d       : 1;
        unsigned csr_mask     : 1;
        unsigned              : 1;
        unsigned csr_chen     : 1;
        unsigned csr_im       : 1;
        unsigned csr_end      : 1;
        unsigned csr_done     : 1;
        unsigned csr_wcx      : 16;
    };
} DMA_MEM_CSR_REG;

typedef union
{
    unsigned int _val;
    struct
    {
        unsigned or_or0 : 16;
        unsigned or_or1 : 16;
    };
} DMA_MEM_OR_REG;

//
// Structure: dma_mem_channel
//
// Dma memory channel registers.
//
//
typedef volatile struct
{
    //Variable: CSR
    // CSR register
    volatile unsigned int CSR;
    //Variable: CP
    // CP register
    volatile unsigned int CP;
    //Variable: IR0
    // IR0 register
    volatile unsigned int IR0;
    //Variable: IR1
    // IR1 register
    volatile unsigned int IR1;
    //Variable: OR
    // OR register
    volatile unsigned int OR;
    //Variable: Y
    // Y register
    volatile unsigned int Y;
    volatile unsigned int Run;
    volatile unsigned int skip[25];
} dma_mem_channel;


#define _MemCh		((dma_mem_channel volatile *)0xb82f0000)
#define _MemCh0		((dma_mem_channel volatile *)0xb82f0000)
#define _MemCh1		((dma_mem_channel volatile *)0xb82f0080)
#define _MemCh2		((dma_mem_channel volatile *)0xb82f0100)
#define _MemCh3		((dma_mem_channel volatile *)0xb82f0180)

//
// Structure: dma_mem_chain
//
// Dma chain description.
//
//
typedef struct
{
    unsigned int IR0;
    unsigned int IR1;
    short OR0;
    short OR1;
    short OY;
    unsigned short WCY;
    unsigned int CP;
    unsigned int CSR;
} dma_mem_chain;

// Section: Functions
//
// Function: get_dma_dev
//
// Gets pointer to selected dma channel registers.
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//
// Return:
//		NULL        - dma_id is not in 0..3 range (possible dma memory channels are
//					  dma0, dma1, dma2, dma3 in nvcom02)
//		Pointer to dma<id> registers - otherway
//
// > get_dma_dev(0);
//
dma_mem_channel* get_dma_dev(int dma_id);

// Function: dma_virt2phys
//
// Transforms address form virtual address space into physical (bus) address space.
//
// Parameters:
//      virt_addr      - address in virtual address space
//
// Return:
//		unsigned int   - address in physical address space
unsigned int dma_virt2phys(unsigned int virt_addr);

// Function: dma_configure
//
// Setups dma memory channel registers. After call of this function the selected dma channel is ready
// to start dma transfer. The speed of memory transfer is set by wn parameter, the length of transmitted
// words is set by en64 parameter
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//		dst			- physical or virtual address of destination buffer
//		src			- physical or virtual address of source buffer
//		size        - size of transmitted buffer in bytes
//		wn			- speed of transfer in words (1..15)
//		en64		- length of transmitted word 0 - 32 bit, 1 - 64 bit
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
enum ERL_ERROR dma_configure(int dma_id, void * dst, const void * src, int size, int wn, int en64);

// Function: dma_configure2d
//
// Setups dma memory channel registers for 2d transmit. After call of this function the selected dma channel is ready
// to start dma transfer. The speed of memory transfer is set by wn parameter, the length of transmitted
// words is set by en64 parameter
//
// Parameters:
//              dma_id          - number of requested memory dma channel
//		dst	        - physical or virtual address of destination buffer
//		src		- physical or virtual address of source buffer
//		line            - number of lines
//		size            - size of each line in bytes
//		wn              - speed of transfer in words (1..15)
//		en64		- length of transmitted word 0 - 32 bit, 1 - 64 bit
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
enum ERL_ERROR dma_configure2d(int dma_id, void * dst, const void * src, int line, int size, int wn, int en64);

// Function: dma_run
//
// Starts dma memory channel. The dma channel registers must be configured before by dma_configure
// function or by access to dma_mem_channel structure directly.
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
// See also:
//			<dma_configure>
//			<dma_wait>
//
enum ERL_ERROR dma_run(int dma_id);

// Function: dma_wait
//
// Waits dma memory channel stops transfer. This function blocks execution thread.
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
// See also:
//			<dma_configure>
//			<dma_wait>
//
enum ERL_ERROR dma_wait(int dma_id);

// Function: dma_copy
//
// Blocking copy of buffer via dma memory channel. The execution thread is blocked until the dma channel stops its work.
// The speed of dma transfer is set to 15, the length of transferred buffer is 64 bit if source and destination addresses
// are aligned to 64, and 32 bit - otherwise.
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//		dst			- physical or virtual address of destination buffer
//		src			- physical or virtual address of source buffer
//		size        - size of transmitted buffer in bytes
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
// > #include "dma.h"
// > #define BUF_SIZE 0x400
// >
// > int src_data[BUF_SIZE];
// > int dst_data[BUF_SIZE];
// >
// > int main() {
// >         for (int i=0; i<BUF_SIZE; i+=1) src_data[i] = i;
// >         dma_copy(0, dst_data, src_data, BUF_SIZE * sizeof(int));
// >         return 0 ;
// > }
enum ERL_ERROR dma_copy(unsigned int dma_id,unsigned int* dst,unsigned int* src,unsigned int size);

// Function: dma_copy2d
//
// Blocking copy of 2d array via dma memory channel. The execution thread is blocked until the dma channel stops its work.
// The speed of dma transfer is set to 15, the length of transferred buffer 32 bit.
//
// Parameters:
//              dma_id          - number of requested memory dma channel
//		dst	        - physical or virtual address of destination buffer
//		stride_dst	- destination stride in bytes
//		src	        - physical or virtual address of source buffer
//		stride_src	- source stride in bytes
//		width		- size of line in bytes
//		height		- number of lines
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//              ERL_PROGRAM_ERROR - size or line number is wrong
//
enum ERL_ERROR dma_copy2d(unsigned int dma_id,unsigned int* dst,unsigned int stride_dst,unsigned int* src, unsigned int stride_src, unsigned int width, unsigned int height);

// Function: dma_copy_sampling
//
// Blocking copy of buffer via dma memory channel. The execution thread is blocked until the dma channel stops its work.
// Has interface to OR registers
// (see pict1.png)
// (see pict2.png)
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//		dst			- physical or virtual address of destination buffer
//		dst_or		- destination buffer step (OR0 register)
//		src			- physical or virtual address of source buffer
//		src_or		- source buffer step (OR1 register)
//		size        - size of transmitted buffer in bytes
//		en64		- length of transmitted word 0 - 32 bit, 1 - 64 bit
//
// Return:
//		ERL_NO_ERROR - configuration procedure is successful
//		ERL_SYSTEM_ERROR - dma channel id wrong
//
// See also:
//			<dma_copy>
//
enum ERL_ERROR dma_copy_sampling(unsigned int dma_id,unsigned int* dst,unsigned int dst_or,unsigned int* src,unsigned int src_or,unsigned int size,int en64);

// Function: dma_fill_link
//
// Prepares one link in dma chain. To set all transfers call dma_fill_link consequently and setup required addresses
//
// Parameters:
//      link      - previous dma chain link
//		addr0	  - physical or virtual address of destination buffer
//   	addr1	  - physical or virtual address of source buffer
//		flags        - flags to set in csr register
// Return:
//		Pointer to dma chain link
//
// See also:
// 	<dma_start_chain>
//
dma_mem_chain * dma_fill_link  (dma_mem_chain *link, void *addr0, void *addr1, unsigned int size, unsigned int flags);

// Function: dma_fill_link2d
//
// Prepares one link in dma chain in 2d modes. To set all transfers call dma_fill_link2d consequently and
// setup required addresses
//
// Parameters:
//      link      - previous dma chain link
//		addr0	  - physical or virtual address of destination buffer
//   	addr1	  - physical or virtual address of source buffer
//		width	  - width
//		height	  - height
//		stride    - stride
//		flags     - flags to set in csr register
//
// Return:
//		Pointer to dma chain link
//
// See also:
// 	<dma_start_chain>
//
dma_mem_chain * dma_fill_link2d(dma_mem_chain *link, void *addr0, void *addr1, unsigned int width, unsigned int height, unsigned int stride, unsigned int flags);

// Function: dma_start_chain
//
// Starts dma memory channel in chain mode. The dma chain links must be configured before by dma_fill_link or
// dma_fill_link2d functions.
//
// Parameters:
//      dma_id      - number of requested memory dma channel
//		link		- first link in chain
//
// See also:
//			<dma_fill_link>
//			<dma_fill_link2d>
//
void dma_start_chain(int dma_id, dma_mem_chain *link);

#ifdef	__cplusplus
}
#endif

#endif // _DMA_H_