# SPDX-License-Identifier: MIT
# Copyright 2023-2024 RnD Center "ELVEES", JSC

# MDB script to start sbl-s1, ddrinit, sbl-s3,
# TF-A and U-Boot on MCom-03 SoC. Script uses DDR0.

pb python
pb import os
pb import sys
pb IMAGES_PATH = 'buildroot/output/images'
pb SCRIPTS_PATH = f'{IMAGES_PATH}/sbl/scripts'
pb sys.path.append(SCRIPTS_PATH)
pb import helpers
pb end

pb python
pb dtb = os.environ.get('MDB_DTB_FILE', 'mcom03-mcom03bub-r1.3.0.dtb')
pb board = helpers.parse_ddrinit_dtb_map(f'{SCRIPTS_PATH}/ddrinit-dtb-map.txt', dtb)
pb end

# Load and run sbl-s1 to setup required clocks
loadelf buildroot/output/images/sbl/sbl-s1.elf
hbp set jtag
run
hbp unset jtag

# Load and run ddrinit to setup DDR memory
py helpers.loadbin(f'{IMAGES_PATH}/ddrinit-{board}/ddrinit.bin', 0xa0000000)
hbp set 0xa0000100
run 0xa0000000
hbp unset 0xa0000100

# Load and run set-secure-regions.elf to setup Secure Regions and
# to take them into account in the DDR memory map
loadelf buildroot/output/images/sbl/scripts/set-secure-regions.elf
hbp set jtag
run
hbp unset jtag

# Load U-Boots dtb to 0x8_9040_2000 which is mapped to 0xC0002000
py helpers.loadbin(f'{IMAGES_PATH}/uboot-dtb/{dtb}', 0xC0002000)

# Load TF-A to 0x8_8030_0000 which is mapped to 0xc0300000
loadbin buildroot/output/images/bl31.bin 0xc0300000

# Load U-Boot to 0x8_9048_0000 which is mapped to 0xc0080000
loadbin buildroot/output/images/u-boot.bin 0xc0080000

# Load and run sbl-s3 to launch TF-A and provide mailbox services
loadbin buildroot/output/images/sbl/sbl-s3.bin 0x40003000
set RISC.PC 0x40003000

quit